kvr16lr11d4k4/64i 64gb (16gb 2rx4 2g x 72-bit x 4 pcs.) pc3l-12800 cl11 registered w/parity 240-pin dimm kit description valueram's kvr16lr11d4k4/64i is a kit of four 2g x 72-bit (16gb) ddr3l-1600 cl11 sdram (synchronous dram), registered w/parity, low voltage, 2rx4 ecc, intel ? compatibility tested, memory modules, based on thirty-six 1g x 4-bit fbga components per module. total kit capacity is 64gb. the spds are programmed to jedec standard latency ddr3-1600 timing of 11-11-11 at 1.35v or 1.5v. each 240-pin dimm uses gold contact fingers. the electrical and mechanical specifications are as follows: features ? jedec standard 1.35v (1.28v ~ 1.45v) and 1.5v (1.425v ~ 1.575v) power supply ? vddq = 1.35v (1.28v ~ 1.45v) and 1.5v (1.425v ~ 1.575v) ? 800mhz fck for 1600mb/sec/pin ? 8 independent internal bank ? programmable cas latency: 11, 10, 9, 8, 7, 6 ? programmable additive latency: 0, cl - 2, or cl - 1 clock ? 8-bit pre-fetch ? burst length: 8 (interleave without any limit, sequential with starting address ?000? only), 4 with tccd = 4 which does not allow seamless read or write [either on the fly using a12 or mrs] ? bi-directional differential data strobe ? internal(self) calibration : internal self calibration through zq pin (rzq : 240 ohm 1%) ? on die termination using odt pin ? on-dimm thermal sensor (grade b) ? average refresh period 7.8us at lower than tcase 85c, 3.9us at 85c < tcase < 95c ? asynchronous reset ? pcb : height 1.180? (30.00mm), double sided component document no. valueram1415-001.b00 10/09/14 page 1 memory module speci cations continued >> specifications s e l c y c 1 1 ) d d i ( l c row cycle time (trcmin) 48.125ns (min.) refresh to active/refresh 260ns (min.) command time (trfcmin) row active time (trasmin) 35ns (min.) maximum operating power (1.35v) = 4.493 w* (per module) 0 - v 4 9 g n i t a r l u operating temperature 0 o c to 85 o c storage temperature -55 o c to +100 o c *power will vary depending on the sdram and register/pll used.
module dimensions: document no. valueram1415-001.b00 page 2
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